lunes, 5 de diciembre de 2016

Ficha del recurso:


Vínculo original en INTERNATIONAL JOURNAL OF PRODUCTION RESEARCH, 50 (10):2710-2719; 10.1080/00207543.2011.588617 2012
Ying, KC

Última actualización:

jueves, 28 de junio de 2012

Entrada en el observatorio:

jueves, 28 de junio de 2012



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Scheduling identical wafer sorting parallel machines with sequence-dependent setup times using an iterated greedy heuristic

Wafer sorting is one of the most critical processes involved in semiconductor device fabrication. This study addresses the wafer sorting scheduling problem (WSSP), with minimisation of total setup time as the primary criterion and minimisation of the number of testers used as the secondary criterion. In view of the strongly NP-hard nature of this problem, a simple and effective iterated greedy heuristic is presented. The performance of the proposed heuristic is empirically evaluated by 480 simulation instances based on the characteristics of a real wafer testing shop-floor. The experimental results show that the proposed heuristic is effective and efficient as compared to the state-of-art algorithms developed for the same problem. It is believed that this study has developed an approach that is easy to comprehend and satisfies the practical needs of wafer sorting.